Design of Embedded Network Video Encoder Based on TM1300

With the popularization of network multimedia application, the independent embedded multimedia communication terminal system has become a research hotspot because of its low cost and good performance. The research of embedded video encoder with network communication function has become the core content in the design of multimedia communication terminal system. The working principle of embedded network video encoder is to digitize the analog video signal and send it to the network after processing according to the international standard compression coding and network protocol. The client can receive the video data from the network and play it back in real time after decoding. Embedded video encoder is an independent device with close binding between high-performance processor and operating system, specific function and special design. Unlike the card insertion system, it is affected by other software and hardware in the general computer system. Its performance is more stable and reliable, and it is easy to realize the modular design of the system, which is convenient for installation, management and maintenance.

TM1300 is a high-performance multimedia processor, which can adopt PSOs embedded real-time operating system, and provides a fully functional online debugging tool. Designers can develop various resources and debug various applications of TriMedia on PSOs platform through online debugging tools, so as to finally realize the whole system. This paper presents an embedded video encoder based on TM1300 for IP network, and discusses the software and hardware design of the whole system in detail. We applied the encoder to the monitoring system, realized real-time video transmission and achieved good image quality. The main functions of network video encoder include: A / D conversion of video signal, H.263 video compression coding, H.323 network protocol processing, camera control and transparent data transmission.

2 hardware design

2.1 introduction to TM1300

TM1300, the core of video encoder, is a high-performance DSP for multimedia applications launched by Philips company. It can process high-quality video and audio. The powerful compiler and software development environment provided by TriMedia enables developers to write applications in C or C language instead of assembly language.

The core of TM1300 is a 32-bit processor, which can perform 32-bit linear addressing, and the addressing capacity can reach 4GB. The core processor of TM1300 adopts VLIW structure, which can execute 5 instructions at the same time in each clock cycle. TM1300 supports 16kb data cache and 32KB instruction cache, and the data cache is bidirectional. TM1300 also integrates PCI bus interface, which can be used not only as slave CPU in PC environment, but also as master CPU in embedded system. TM1300 is different from general DSP. It has special video interface, audio interface, image coprocessor unit, variable length decoder unit and other special units. Image coprocessor is mainly used for image filtering or scaling to improve the processing speed; The variable length decoder can assist the kernel to complete Huffman decoding.

2.2 overall hardware structure

The overall hardware structure of network video encoder is shown in Figure 1. The encoder converts the analog video signal from the camera into a digital video signal in YUV format through the AD conversion chip SAA7111A, which is compressed into image data code streams of various rates by TM1300 (1) according to the H.263 protocol, and then transmitted to TM1300 (2) responsible for protocol processing through PCI bus, After the video compressed data is encapsulated here, it is finally transmitted to the Ethernet interface unit with Ethernet interface controller Rtl8139c (L) as the core through PCI bus, which is sent to IP network. The peripheral expansion module takes the W77E58 single chip microcomputer as the core, controls the camera and sends and receives transparent data through two serial ports. CPLD mainly completes address decoding, PCI bus arbitration and other functions. The developed application is compiled, connected and written into flash. After the encoder is powered on and reset, the program in flash is moved to SDRAM through the bootstrap program in EEPROM, and the system starts to run. According to the above functions, the hardware design of network video encoder can be divided into the following four functional units: (1) video coding unit; (2) Protocol processing unit; (3) Network interface unit; (4) Peripheral expansion unit.

Figure 1 overall hardware structure of network video encoder

2.3 video coding unit

The video coding unit takes TM1300 (1) as the core, and the peripheral devices include EEPROM, 16m SDRAM, video ad chip SAA7111A, dual port RAM and 16MB flash. SAA7111A is Philips's enhanced video input processor (evip), and the input analog video signal can be CVBS (pal, NTSC, etc.) and S-Video (Y / C), After a / D conversion, yuv4 ∶ 2 ∶ 2 digital video signal conforming to ccir-656 is output. The schematic diagram of video input is shown in Figure 2. The YUV digital video output port of SAA7111A is connected with the video input port (VI) of TM1300. The working mode of SAA7111A is configured by TM1300 through I2C bus.

Fig. 2 Schematic diagram of video input

SDRAM is synchronous dynamic RAM. It provides burst access mode for accessing applications, original digital video data and processed intermediate data. TM1300 (1) adopts 2 pieces of external SDRAM (12rank interface mode), and the capacity of each piece is 4 & times; 1M &TImes; 16bit, with a total capacity of 16MB

After power on reset, TM1300 (1) reads the startup information from EEPROM through I2C bus, configures clock frequency division register and SDRAM register, then moves the bootstrap program in EEPROM to SDRAM starting from dram-base and starts to execute the bootstrap program. After the bootstrap program moves the corresponding application program in flash to SDRAM of TM1300 (1) and TM1300 (2), They began to work normally.

2.4 protocol processing unit

The protocol processing unit takes TM1300 (2) as the core and expands EEPROM and 16m SDRAM. Its circuit is similar to the corresponding memory interface and startup circuit design of video coding unit. The working mode of TM1300 (2) is slave mode. After power on reset, read the startup information from Serial EEPROM through I2C bus, and configure clock frequency division register and SDRAM register. Then wait for TM1300 (1) to complete the remaining work of system startup, including the configuration of mmio space and DRAM space. Wait for TM1300 (1) to move the corresponding application in flash to the SDRAM of TM1300 (2), and TM1300 (2) can start working normally.

2.5 network interface unit

The schematic diagram of the network interface unit is shown in Figure 3. With the Rtl8139c (L) ethernet controller of Realtek as the core, it is connected to the LAN through twisted pair through Ethernet transformer st6118t and RJ 45 socket. Rtl8139c (L) interface is fully compatible with pci2.1 specification and can be conveniently hung on the PCI bus of TriMedia. The Ethernet interface packages and transmits the data after video coding and protocol processing to Ethernet according to the data format of Ethernet, automatically monitors the data change at the receiving end, unpacks the received data and transmits it to TM1300 (2).

Fig. 3 Schematic diagram of network interface unit