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If we use the sampling query or interrupt mode, it is also possible to switch and configure the subsequent channels after every two channels are converted, and then start the ad module. As for that time interval, we often use timers to assist. Obviously, this can sometimes seem a little cumbersome.
In this case, we can also consider using the discontinuous conversion mode of ADC. That is, an ADC conversion channel sequence is divided into several groups. Each ADC conversion trigger event will convert a group of ad channels, which will be carried out in turn until the conversion of the whole sequence is completed.
For example, we use five channels ch1 / CH2 / CH3 / CH4 / CH5 of an ADC module, divide them into three groups, and use a timer to trigger the ADC. In the first trigger, AD conversion of ch1 / CH2 channels is performed, in the second trigger, AD conversion of CH3 / CH4 channels is performed, and in the third trigger, AD conversion of CH5 channel is completed. The fourth trigger performs the same conversion as the first trigger, and the cycle continues.
We might as well give a practical example based on the above description. Use stm32f411 discovery development board for debugging verification. Five consecutive ad channels starting from ch1 using ADC1 module are divided into three groups. As shown in the figure below.
We use the timer update event to trigger ADC conversion. The interval between group 1 and group 2 conversion and the interval between group 2 and group 3 conversion are controlled by timely adjusting the timing length of the timer.
We use the timer update event to trigger DMA, and modify the value of arr by DMA to adjust the time interval between two adjacent groups of transitions. In addition, the conversion result of ADC triggers DMA through EOC event, and DMA orderly moves the conversion result to the specified memory space.
After the conversion of the five channels of the whole ADC sequence is completed, the DMA transmission into the ADC is interrupted, and the conversion results of each channel are processed in the interrupt callback function. After that, the next round of ADC conversion can be started.
Sort out the whole implementation process mentioned above:
1. ADC conversion is triggered by the update event of the timer and performs packet conversion according to the intermittent mode.
2. Two DMA transmission channels are enabled, one channel is used for the handling of ADC results, and the other channel is used for the update of timer arr value.
When the first timing trigger event occurs, complete the conversion of the first group of ad channels [ch1 and CH2], trigger the DMA transmission of the timer, modify the value of arr, and determine the time interval between the first trigger event and the second trigger event; When the second timing trigger event occurs, complete the conversion of the second group of ad channels [CH3, CH4], trigger the DMA transmission of the timer, and modify the value of arr to determine the time interval between the second trigger event and the third trigger event; When the third trigger event occurs, only the conversion of group 3 ad channel [CH5] is performed here, and the ARR is not modified through DMA. Its value will be specified by the user in the callback function of DMA transmission completion interrupt of ADC.
The whole process of configuration and code implementation is posted below for reference. Use the stm32cube MX tool for graphical configuration, and organize the code based on the stm32cube Library of ST company.
It is assumed that after the conversion of the first group of ad channels, the conversion of the second group of ad channels is triggered after 0x7000 time units, and then the conversion of the third group of ad channels is triggered after 0x5000 time units. [in practical application, the time base parameters depend on the specific situation]
1ã Configuration based on cubemx [RCC / sys configuration omitted].
1.1 tim3 configuration, the update event of tim3 triggers ADC conversion and DMA for arr update.
1.2 ADC configuration. [select 5 ADC channels, intermittent conversion mode, enable DMA transmission of ADC]
2ã Generate initialization code.
Based on stm32cube library, the engineering code based on ARM keil MDK integrated development environment is generated.
3ã Add user code. [code based on stm32cube library]
First, introduce the two arrays used in the user code, namely ADC_ Value [5] and data_ Arr[2].
Where ADC_ Value [5] is used to store the conversion result of ADC channel, data_ Arr [2] is used to store arr data to change the timing cycle. They are accessed by different DMA streams.
3.1 add the following user code in main().
Line 1, clear the timer update event flag.
The two lines in the red box respectively start the DMA transmission of ADC / tim3.
The fourth step is to execute the DMA request that can update the tim3 event.
4. Result validation.
Connect the hardware, compile the code, and you can see the conversion results after running. The five ad channels are divided into three groups, and the conversion is triggered successively according to the predetermined time interval, and the conversion result is moved to the specified memory space by DMA. Through the debugger, we can see the ADC results and the corresponding changes of timer arr.
Summary: here is mainly to introduce the ADC intermittent conversion mode of STM32 chip, and two peripherals, timer and DMA, are used at the same time. I hope it can bring some reference or enlightenment to readers and be used flexibly in my own development in the future. These peripherals are the most commonly used and basic peripherals of STM32 chip. If we can use them flexibly after mastering them, it will make our STM32 development work more convenient.