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18 Bit Resolution Self-tuning a / D Converter Mcp3421

1. Mcp3421 packaging form and structure

Mcp3421 is an 18 bit resolution device of microchip A / D converter series, which is packaged in SOT23-6. Figure 1 shows the mcp342 pin distribution diagram, and the functions of each pin are listed in Table 1. Mcp342 adopts microchip patented differential switched capacitor conversion and digital filtering technology, which is designed for applications requiring high resolution and low power consumption. In this application, space and low power consumption are the primary design considerations. Mcp3421 can work under the voltage of 2.7 5.5V single power supply and consume very low current. Under the condition of VDD = 3 V, single conversion and 1 SPS, the current consumption is only 39 μ A (typical).

2 working principle of mcp3421

Mcp3421 is a fully differential, 18 bit resolution △ - ∑ A / D converter with self-tuning function. It includes △ - EA / D converter, programmable gain amplifier (PGA), clock oscillator, I2C serial interface and 5 parts of 2.048 V voltage reference. Mcp3421 is simple in design and easy to configure, allowing design engineers to obtain accurate measurement results through the minimum configuration.

2.1 △ - ∑ A / D converter

Mcp3421 △ - ∑ A / D converter consists of a differential switched capacitor △ - ∑ modulator and a digital filter. The modulator measures the differential analog input voltage (amplified by the internal PGA) and compares it with the internal voltage reference. Mcp3421 internally integrates a 2.048 V voltage reference. The digital filter receives the high-speed data stream from the modulator and outputs a digital code after being processed by the digital filter. The digital code output by mcp3421 is a function of PGA gain, input signal and internal voltage reference. In a fixed configuration, the output digital code is proportional to the voltage difference between the two analog input pins. The output code is limited to a certain number range, which depends on the number of bits required to represent the output code and is also related to the adopted conversion rate, as listed in Table 2.

The output code of mcp3421 is in the form of binary complement. The maximum n-bit code is 2N-1 and the minimum n-bit code is - 2N-1. All codes output by mcp3421 are right aligned and symbol extended. The format of output code under different conversion modes is listed in Table 3.

2.2 clock oscillator

Mcp3421 includes a clock oscillator, which drives the delta sigma modulator and digital filter. The user can set the configuration register to select the sampling rate of mcp3421 as 3.75, 15, 60 or 240sps. Mcp3421 cannot use external modulator input clock.

2.3 self calibration

Mcp3421 integrates a self calibration circuit. The self calibration system works continuously without user intervention. Mcp3421 performs self calibration of offset voltage and gain at each conversion. In this way, reliable conversion results can still be provided when the temperature and power supply voltage change.

2.4 I2C serial interface

Mcp3421 communicates with the host through I2C serial interface. Mcp3421 can only be used as a slave device and provides 8 optional I2C addresses. The I2C interface of mcp3421 supports three modes: Standard (100 kbps), fast (400 kbps) and high speed (3.4 Mbps), and is fully compatible with I2C bus protocol.

The user can read / write the configuration register in mcp3421 through I2C interface, and then change the working mode of the device and query the working state of the device. At the same time, the I2C interface is also used to read the converted data code.

18 Bit Resolution Self-tuning a / D Converter Mcp3421 1

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